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Searched refs:IP1_11_8 (Results 1 – 10 of 10) sorted by relevance

/drivers/pinctrl/renesas/
Dpfc-r8a77970.c56 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
173 #define IP1_11_8 FM(DU_DG6) F_(0, 0) F_(0, 0) FM(A10) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, … macro
270 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
434 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
435 PINMUX_IPSR_GPSR(IP1_11_8, A10),
436 PINMUX_IPSR_MSEL(IP1_11_8, FSO_TOE_N_A, SEL_RFSO_0),
2247 IP1_11_8
Dpfc-r8a77980.c57 #define GPSR0_10 F_(DU_DG6, IP1_11_8)
206 #define IP1_11_8 FM(DU_DG6) FM(SCIF_CLK_A) FM(GETHER_MDIO_B) FM(A10) F_(0, 0) F_(0, 0) F_(0, 0)… macro
319 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
508 PINMUX_IPSR_GPSR(IP1_11_8, DU_DG6),
509 PINMUX_IPSR_MSEL(IP1_11_8, SCIF_CLK_A, SEL_HSCIF0_0),
510 PINMUX_IPSR_MSEL(IP1_11_8, GETHER_MDIO_B, SEL_GETHER_1),
511 PINMUX_IPSR_GPSR(IP1_11_8, A10),
2700 IP1_11_8
Dpfc-r8a77995.c84 #define GPSR1_3 F_(DU_DB3, IP1_11_8)
219 #define IP1_11_8 FM(DU_DB3) FM(LCDOUT3) FM(SCK5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
361 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
572 PINMUX_IPSR_GPSR(IP1_11_8, DU_DB3),
573 PINMUX_IPSR_GPSR(IP1_11_8, LCDOUT3),
574 PINMUX_IPSR_MSEL(IP1_11_8, SCK5_B, SEL_SCIF5_1),
2688 IP1_11_8
Dpfc-r8a77950.c139 #define GPSR2_4 F_(IRQ4, IP1_11_8)
263 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0)… macro
437 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
695 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
696 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
697 PINMUX_IPSR_GPSR(IP1_11_8, A24),
698 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
699 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
700 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
4925 IP1_11_8
Dpfc-r8a77470.c582 PINMUX_IPSR_GPSR(IP1_11_8, D0),
583 PINMUX_IPSR_MSEL(IP1_11_8, SCL3_B, SEL_I2C03_1),
584 PINMUX_IPSR_MSEL(IP1_11_8, RX5_B, SEL_SCIF5_1),
585 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
586 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF2_RXD_C, SEL_MSIOF2_2),
587 PINMUX_IPSR_MSEL(IP1_11_8, SSI_SDATA5_B, SEL_SSI5_1),
Dpfc-r8a77965.c145 #define GPSR2_4 F_(IRQ4, IP1_11_8)
269 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0)… macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
710 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
711 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
712 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
713 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
714 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
715 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_E, SEL_MSIOF3_4),
5559 IP1_11_8
Dpfc-r8a7796.c145 #define GPSR2_4 F_(IRQ4, IP1_11_8)
269 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0)… macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
709 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
710 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
711 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
712 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
713 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
714 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_E, SEL_MSIOF3_4),
5318 IP1_11_8
Dpfc-r8a77951.c140 #define GPSR2_4 F_(IRQ4, IP1_11_8)
264 #define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) F_(0, 0) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0)… macro
447 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
704 PINMUX_IPSR_GPSR(IP1_11_8, IRQ4),
705 PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS),
706 PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC),
707 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1),
708 PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1),
709 PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_E, SEL_MSIOF3_4),
5363 IP1_11_8
Dpfc-r8a77990.c126 #define GPSR2_11 F_(QSPI1_SSL, IP1_11_8)
223 #define IP1_11_8 FM(QSPI1_SSL) FM(RIF3_SYNC_A) FM(HSCK3_C) FM(VI4_DATA5_A) F_(0, 0) F_(0, 0) F… macro
387 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
594 PINMUX_IPSR_GPSR(IP1_11_8, QSPI1_SSL),
595 PINMUX_IPSR_MSEL(IP1_11_8, RIF3_SYNC_A, SEL_DRIF3_0),
596 PINMUX_IPSR_MSEL(IP1_11_8, HSCK3_C, SEL_HSCIF3_2),
597 PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA5_A, SEL_VIN4_0),
4802 IP1_11_8
Dpfc-r8a7790.c874 PINMUX_IPSR_GPSR(IP1_11_8, D11),
875 PINMUX_IPSR_MSEL(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2),
876 PINMUX_IPSR_GPSR(IP1_11_8, AVB_TXD3),
877 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3, SEL_VI0_0),
878 PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3_B, SEL_VI0_1),
879 PINMUX_IPSR_MSEL(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0),