/drivers/pinctrl/renesas/ |
D | pfc-r8a77970.c | 108 #define GPSR2_7 F_(VI0_DATA3, IP3_27_24) 193 #define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro 274 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 519 PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3), 520 PINMUX_IPSR_GPSR(IP3_27_24, HSCK1), 521 PINMUX_IPSR_MSEL(IP3_27_24, SCL3_A, SEL_I2C3_0), 2263 IP3_27_24
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D | pfc-r8a77995.c | 64 #define GPSR1_23 F_(DU_DR7, IP3_27_24) 239 #define IP3_27_24 FM(DU_DR7) FM(LCDOUT23) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro 365 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 653 PINMUX_IPSR_GPSR(IP3_27_24, DU_DR7), 654 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT23), 655 PINMUX_IPSR_MSEL(IP3_27_24, TCLK1_B, SEL_TMU_1_1), 2704 IP3_27_24
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D | pfc-r8a77980.c | 122 #define GPSR2_7 F_(VI0_DATA3, IP3_27_24) 226 #define IP3_27_24 FM(VI0_DATA3) FM(HSCK1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro 323 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 601 PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3), 602 PINMUX_IPSR_GPSR(IP3_27_24, HSCK1), 2716 IP3_27_24
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D | pfc-r8a77990.c | 102 #define GPSR1_7 F_(A7, IP3_27_24) 243 #define IP3_27_24 FM(A7) FM(TX4_A) FM(MSIOF3_TXD_B) FM(VI4_DATA11) F_(0, 0) F_(0, 0) FM(RIF2_D… macro 391 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 713 PINMUX_IPSR_GPSR(IP3_27_24, A7), 714 PINMUX_IPSR_GPSR(IP3_27_24, TX4_A), 715 PINMUX_IPSR_GPSR(IP3_27_24, MSIOF3_TXD_B), 716 PINMUX_IPSR_GPSR(IP3_27_24, VI4_DATA11), 717 PINMUX_IPSR_MSEL(IP3_27_24, RIF2_D1_B, SEL_DRIF2_1), 4818 IP3_27_24
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D | pfc-r8a77950.c | 111 #define GPSR1_15 F_(A15, IP3_27_24) 285 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro 441 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 838 PINMUX_IPSR_GPSR(IP3_27_24, A15), 839 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), 840 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), 841 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), 842 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), 843 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), 4941 IP3_27_24
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D | pfc-r8a77965.c | 117 #define GPSR1_15 F_(A15, IP3_27_24) 291 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro 456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 851 PINMUX_IPSR_GPSR(IP3_27_24, A15), 852 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), 853 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), 854 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), 855 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), 856 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), 5575 IP3_27_24
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D | pfc-r8a7796.c | 117 #define GPSR1_15 F_(A15, IP3_27_24) 291 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro 456 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 849 PINMUX_IPSR_GPSR(IP3_27_24, A15), 850 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), 851 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), 852 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), 853 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), 854 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), 5334 IP3_27_24
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D | pfc-r8a77951.c | 112 #define GPSR1_15 F_(A15, IP3_27_24) 286 #define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(… macro 451 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ 845 PINMUX_IPSR_GPSR(IP3_27_24, A15), 846 PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), 847 PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), 848 PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), 849 PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), 850 PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), 5379 IP3_27_24
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D | pfc-r8a77470.c | 667 PINMUX_IPSR_GPSR(IP3_27_24, QSPI0_IO3), 668 PINMUX_IPSR_GPSR(IP3_27_24, RD_N),
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