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Searched refs:MC_SEQ_WR_CTL_2 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/radeon/
Dsid.h591 #define MC_SEQ_WR_CTL_2 0x2b54 macro
Dcikd.h716 #define MC_SEQ_WR_CTL_2 0x2b54 macro
Dci_dpm.c4430 case MC_SEQ_WR_CTL_2 >> 2: in ci_check_s0_mc_reg_index()
4539 case MC_SEQ_WR_CTL_2: in ci_register_patching_mc_seq()
4616 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()
Dsi_dpm.c5450 case MC_SEQ_WR_CTL_2 >> 2: in si_check_s0_mc_reg_index()
5538 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h592 #define MC_SEQ_WR_CTL_2 0xAD5 macro
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5943 case MC_SEQ_WR_CTL_2: in si_check_s0_mc_reg_index()
6031 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()