/drivers/clk/rockchip/ |
D | clk-rk3308.c | 194 #define MFLAGS CLK_MUX_HIWORD_MASK macro 200 RK3308_CLKSEL_CON(11), 14, 2, MFLAGS); 204 RK3308_CLKSEL_CON(14), 14, 2, MFLAGS); 208 RK3308_CLKSEL_CON(17), 14, 2, MFLAGS); 212 RK3308_CLKSEL_CON(20), 14, 2, MFLAGS); 216 RK3308_CLKSEL_CON(23), 14, 2, MFLAGS); 220 RK3308_CLKSEL_CON(8), 14, 2, MFLAGS); 224 RK3308_CLKSEL_CON(2), 8, 2, MFLAGS); 228 RK3308_CLKSEL_CON(46), 15, 1, MFLAGS); 232 RK3308_CLKSEL_CON(52), 10, 2, MFLAGS); [all …]
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D | clk-rk3568.c | 342 #define MFLAGS CLK_MUX_HIWORD_MASK macro 348 RK3568_CLKSEL_CON(11), 10, 2, MFLAGS); 352 RK3568_CLKSEL_CON(13), 10, 2, MFLAGS); 356 RK3568_CLKSEL_CON(15), 10, 2, MFLAGS); 360 RK3568_CLKSEL_CON(17), 10, 2, MFLAGS); 364 RK3568_CLKSEL_CON(19), 10, 2, MFLAGS); 368 RK3568_CLKSEL_CON(21), 10, 2, MFLAGS); 372 RK3568_CLKSEL_CON(83), 10, 2, MFLAGS); 376 RK3568_CLKSEL_CON(23), 15, 1, MFLAGS); 380 RK3568_CLKSEL_CON(25), 15, 1, MFLAGS); [all …]
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D | clk-rk3328.c | 232 #define MFLAGS CLK_MUX_HIWORD_MASK macro 238 RK3328_CLKSEL_CON(6), 8, 2, MFLAGS); 242 RK3328_CLKSEL_CON(8), 8, 2, MFLAGS); 246 RK3328_CLKSEL_CON(10), 8, 2, MFLAGS); 250 RK3328_CLKSEL_CON(12), 8, 2, MFLAGS); 254 RK3328_CLKSEL_CON(14), 8, 2, MFLAGS); 258 RK3328_CLKSEL_CON(16), 8, 2, MFLAGS); 262 RK3328_CLKSEL_CON(18), 8, 2, MFLAGS); 272 RK3328_CLKSEL_CON(38), 14, 2, MFLAGS, 0, 14, DFLAGS, 277 RK3328_MISC_CON, 13, 1, MFLAGS), [all …]
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D | clk-px30.c | 204 #define MFLAGS CLK_MUX_HIWORD_MASK macro 210 PX30_CLKSEL_CON(26), 15, 1, MFLAGS); 214 PX30_CLKSEL_CON(28), 10, 2, MFLAGS); 218 PX30_CLKSEL_CON(58), 10, 2, MFLAGS); 222 PX30_CLKSEL_CON(30), 10, 2, MFLAGS); 226 PX30_CLKSEL_CON(32), 10, 2, MFLAGS); 230 PX30_CLKSEL_CON(35), 14, 2, MFLAGS); 234 PX30_CLKSEL_CON(38), 14, 2, MFLAGS); 238 PX30_CLKSEL_CON(41), 14, 2, MFLAGS); 242 PX30_CLKSEL_CON(44), 14, 2, MFLAGS); [all …]
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D | clk-rv1108.c | 162 #define MFLAGS CLK_MUX_HIWORD_MASK macro 169 RV1108_CLKSEL_CON(13), 8, 2, MFLAGS); 173 RV1108_CLKSEL_CON(14), 8, 2, MFLAGS); 177 RV1108_CLKSEL_CON(15), 8, 2, MFLAGS); 181 RV1108_CLKSEL_CON(5), 12, 2, MFLAGS); 185 RV1108_CLKSEL_CON(6), 12, 2, MFLAGS); 189 RV1108_CLKSEL_CON(7), 12, 2, MFLAGS); 193 RV1108_MISC_CON, 13, 1, MFLAGS), 195 RV1108_MISC_CON, 15, 1, MFLAGS), 220 RV1108_CLKSEL_CON(37), 6, 2, MFLAGS, 0, 5, DFLAGS, [all …]
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D | clk-rk3228.c | 179 #define MFLAGS CLK_MUX_HIWORD_MASK macro 185 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS); 189 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS); 193 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS); 197 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS); 201 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS); 205 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS); 209 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS); 227 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO, 250 RK2928_MISC_CON, 13, 1, MFLAGS), [all …]
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D | clk-rk3399.c | 240 #define MFLAGS CLK_MUX_HIWORD_MASK macro 247 RK3399_CLKSEL_CON(32), 13, 2, MFLAGS); 251 RK3399_CLKSEL_CON(28), 8, 2, MFLAGS); 255 RK3399_CLKSEL_CON(29), 8, 2, MFLAGS); 259 RK3399_CLKSEL_CON(30), 8, 2, MFLAGS); 263 RK3399_CLKSEL_CON(33), 8, 2, MFLAGS); 267 RK3399_CLKSEL_CON(34), 8, 2, MFLAGS); 271 RK3399_CLKSEL_CON(35), 8, 2, MFLAGS); 275 RK3399_CLKSEL_CON(36), 8, 2, MFLAGS); 279 RK3399_PMU_CLKSEL_CON(5), 8, 2, MFLAGS); [all …]
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D | clk-rv1126.c | 210 #define MFLAGS CLK_MUX_HIWORD_MASK macro 216 RV1126_PMU_CLKSEL_CON(0), 7, 2, MFLAGS); 220 RV1126_PMU_CLKSEL_CON(4), 10, 2, MFLAGS); 224 RV1126_CLKSEL_CON(10), 10, 2, MFLAGS); 228 RV1126_CLKSEL_CON(12), 10, 2, MFLAGS); 232 RV1126_CLKSEL_CON(14), 10, 2, MFLAGS); 236 RV1126_CLKSEL_CON(16), 10, 2, MFLAGS); 240 RV1126_CLKSEL_CON(18), 10, 2, MFLAGS); 244 RV1126_CLKSEL_CON(30), 0, 2, MFLAGS); 248 RV1126_CLKSEL_CON(30), 2, 2, MFLAGS); [all …]
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D | clk-rk3036.c | 145 #define MFLAGS CLK_MUX_HIWORD_MASK macro 151 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS); 155 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS); 159 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS); 163 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS); 167 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS); 188 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO), 201 RK2928_CLKSEL_CON(0), 14, 2, MFLAGS, 8, 5, DFLAGS), 212 RK2928_CLKSEL_CON(10), 14, 2, MFLAGS, 0, 5, DFLAGS, 227 RK2928_CLKSEL_CON(2), 4, 1, MFLAGS, [all …]
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D | clk-rk3128.c | 169 #define MFLAGS CLK_MUX_HIWORD_MASK macro 175 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS); 179 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS); 183 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS); 187 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS); 191 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS); 195 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS); 214 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO), 232 RK2928_MISC_CON, 15, 1, MFLAGS), 236 RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS, [all …]
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D | clk-rk3368.c | 151 #define MFLAGS CLK_MUX_HIWORD_MASK macro 248 RK3368_CLKSEL_CON(27), 8, 2, MFLAGS); 252 RK3368_CLKSEL_CON(31), 8, 2, MFLAGS); 256 RK3368_CLKSEL_CON(53), 8, 2, MFLAGS); 260 RK3368_CLKSEL_CON(33), 8, 2, MFLAGS); 264 RK3368_CLKSEL_CON(35), 8, 2, MFLAGS); 268 RK3368_CLKSEL_CON(39), 8, 2, MFLAGS); 272 RK3368_CLKSEL_CON(41), 8, 2, MFLAGS); 282 RK3368_CLKSEL_CON(13), 8, 1, MFLAGS), 315 RK3368_CLKSEL_CON(4), 6, 2, MFLAGS, 0, 5, DFLAGS), [all …]
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D | clk-rk3288.c | 245 #define MFLAGS CLK_MUX_HIWORD_MASK macro 252 RK3288_CLKSEL_CON(4), 8, 2, MFLAGS); 256 RK3288_CLKSEL_CON(5), 8, 2, MFLAGS); 260 RK3288_CLKSEL_CON(40), 8, 2, MFLAGS); 264 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS); 268 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS); 272 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS); 276 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS); 280 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS); 331 RK3288_CLKSEL_CON(26), 2, 1, MFLAGS, 0, 2, [all …]
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D | clk-rk3188.c | 237 #define MFLAGS CLK_MUX_HIWORD_MASK macro 253 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS); 257 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS); 261 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS); 265 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS); 269 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS); 273 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS); 288 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS, 293 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS, 301 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO, [all …]
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