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Searched refs:M_MI0_CLK_DIV (Results 1 – 1 of 1) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dfpga_defs.h55 #define M_MI0_CLK_DIV 0xff macro
57 #define G_MI0_CLK_DIV(x) (((x) >> S_MI0_CLK_DIV) & M_MI0_CLK_DIV)