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Searched refs:NV_PRAMDAC_TEST_CONTROL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/nouveau/dispnv04/
Ddac.c160 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL); in nv04_dac_detect()
161 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, in nv04_dac_detect()
221 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, saved_rtest_ctrl); in nv04_dac_detect()
260 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
261 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, in nv17_dac_sample_load()
306 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
307 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL, in nv17_dac_sample_load()
311 sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
313 sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
315 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
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Dtvnv17.c71 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv42_tv_sample_load()
90 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0); in nv42_tv_sample_load()
104 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
110 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
118 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl); in nv42_tv_sample_load()
591 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + in nv17_tv_commit()
595 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + in nv17_tv_commit()
Dnvreg.h348 #define NV_PRAMDAC_TEST_CONTROL 0x00680608 macro
Ddfp.c469 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000); in nv04_dfp_commit()
471 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000); in nv04_dfp_commit()