Home
last modified time | relevance | path

Searched refs:NumDcfClkLevelsEnabled (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_smu.h59 uint8_t NumDcfClkLevelsEnabled; member
Ddcn314_clk_mgr.c603 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn314_clk_mgr_helper_populate_bw_params()
808 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn314_clk_mgr_construct()
815 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn314_clk_mgr_construct()
/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu13_driver_if_v13_0_5.h120 uint8_t NumDcfClkLevelsEnabled; member
Dsmu13_driver_if_yellow_carp.h131 uint8_t NumDcfClkLevelsEnabled; member
Dsmu13_driver_if_v13_0_4.h132 uint8_t NumDcfClkLevelsEnabled; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_smu.h78 uint8_t NumDcfClkLevelsEnabled; member
Ddcn315_clk_mgr.c493 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn315_clk_mgr_helper_populate_bw_params()
690 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn315_clk_mgr_construct()
697 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn315_clk_mgr_construct()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_smu.h86 uint8_t NumDcfClkLevelsEnabled; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.h140 uint8_t NumDcfClkLevelsEnabled; member
Ddcn31_clk_mgr.c762 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn31_clk_mgr_construct()
769 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn31_clk_mgr_construct()