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Searched refs:PARITY (Results 1 – 6 of 6) sorted by relevance

/drivers/staging/rts5208/
Dxd.h142 #define PARITY 10 macro
Dxd.c717 (redunt[PARITY] & XD_BA1_ALL0)) { in reset_xd()
757 if ((redunt[PARITY] & (XD_ECC1_ALL1 | XD_ECC2_ALL1)) in xd_check_data_blank()
773 if (redunt[PARITY] & XD_BA1_BA2_EQL) in xd_load_log_block_addr()
776 else if (redunt[PARITY] & XD_BA1_VALID) in xd_load_log_block_addr()
779 else if (redunt[PARITY] & XD_BA2_VALID) in xd_load_log_block_addr()
/drivers/scsi/
DFlashPoint.c491 #define PARITY BIT(5) macro
2226 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_sfm()
2243 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_sfm()
2248 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_sfm()
3807 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_schkdd()
3811 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_schkdd()
4360 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_phaseChkFifo()
4363 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_phaseChkFifo()
4389 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_phaseChkFifo()
4393 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_phaseChkFifo()
D53c700.h284 #define PARITY 0x08 macro
Daha152x.c565 #define PARITY (HOSTDATA(shpnt)->parity) macro
764 PARITY = setup->parity; in aha152x_probe_one()
800 PARITY ? "enabled" : "disabled", in aha152x_probe_one()
1517 SETPORT(SXFRCTL1, (PARITY ? ENSPCHK : 0 ) | ENSTIMER); in busfree_run()
2872 PARITY ? "enabled" : "disabled"); in aha152x_show_info()
D53c700.c692 NCR_700_writeb(FULL_ARBITRATION | ENABLE_PARITY | PARITY in NCR_700_chip_setup()
706 | PARITY | AUTO_ATN, host, SCNTL0_REG); in NCR_700_chip_setup()