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Searched refs:PIXEL_PIPE_STAT_CONTROL (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/radeon/
Dcikd.h1605 # define PIXEL_PIPE_STAT_CONTROL (56 << 0) macro
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h4830 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
Dgfx_8_1_enum.h5382 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
Dgfx_8_0_enum.h5313 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
/drivers/gpu/drm/amd/include/
Dvega10_enum.h15502 PIXEL_PIPE_STAT_CONTROL = 0x00000038, enumerator
Dnavi10_enum.h14212 PIXEL_PIPE_STAT_CONTROL = 0x00000038, enumerator
Dsoc21_enum.h16876 PIXEL_PIPE_STAT_CONTROL = 0x00000038, enumerator