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Searched refs:PLL_OFF_TEST_CTL (Results 1 – 5 of 5) sorted by relevance

/drivers/clk/qcom/
Dclk-alpha-pll.c55 #define PLL_TEST_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL])
70 [PLL_OFF_TEST_CTL] = 0x1c,
80 [PLL_OFF_TEST_CTL] = 0x1c,
90 [PLL_OFF_TEST_CTL] = 0x1c,
99 [PLL_OFF_TEST_CTL] = 0x1c,
114 [PLL_OFF_TEST_CTL] = 0x24,
127 [PLL_OFF_TEST_CTL] = 0x18,
138 [PLL_OFF_TEST_CTL] = 0x1c,
154 [PLL_OFF_TEST_CTL] = 0x2c,
167 [PLL_OFF_TEST_CTL] = 0x28,
[all …]
Dapss-ipq-pll.c18 [PLL_OFF_TEST_CTL] = 0x30,
Dclk-cpu-8996.c88 [PLL_OFF_TEST_CTL] = 0x20,
100 [PLL_OFF_TEST_CTL] = 0x20,
Dclk-alpha-pll.h38 PLL_OFF_TEST_CTL, enumerator
Dlpasscorecc-sc7180.c55 [PLL_OFF_TEST_CTL] = 0x24,