Searched refs:PM (Results 1 – 25 of 57) sorted by relevance
123
52 bool "Exynos PM domains" if COMPILE_TEST56 bool "Samsung PM Suspend debug"57 depends on PM && DEBUG_KERNEL62 Say Y here if you want verbose debugging from the PM Suspend and68 depends on PM && (MACH_SMDK6410)76 bool "S3C2410 PM Suspend Memory CRC"77 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210)80 Enable the PM code's memory area checksum over sleep. This option91 int "S3C2410 PM Suspend CRC Chunksize (KiB)"92 depends on PM && SAMSUNG_PM_CHECK
6 depends on PM && ZYNQMP_FIRMWARE20 bool "Enable Zynq MPSoC generic PM domains"22 depends on PM && ZYNQMP_FIRMWARE25 Say yes to enable device power management through PM domains
11 select PM20 select PM28 select PM37 select PM45 select PM51 select PM129 select PM137 select PM329 select PM
32 depends on PM && OF43 depends on PM && OF54 depends on PM && OF
7 select PM_GENERIC_DOMAINS if PM18 select PM_GENERIC_DOMAINS if PM
5 bool "i.MX GPCv2 PM domains"7 depends on PM
31 PM = 0x07, /* PIO Mode Bit Mask */ enumerator106 data &= ~(PM | PPE); in sch_set_piomode()
8 select PM_GENERIC_DOMAINS if PM20 select PM_GENERIC_DOMAINS if PM
11 depends on PM53 depends on PM106 depends on PM
53 select PM_GENERIC_DOMAINS if PM61 depends on PM
7 depends on PM
7 select PM
4 - Revisit PM support
6 depends on PM && COMMON_CLK && RESET_CONTROLLER
9 depends on PM
8 depends on PM
5 depends on VIDEO_DEV && I2C && PM
6 depends on PM && COMMON_CLK && RESET_CONTROLLER && HAS_DMA
145 AM33XX and AM43XX SoCs and is required for PM. Certain parts of146 the EMIF PM code must run from on-chip SRAM late in the suspend147 sequence so this driver provides several relocatable PM functions148 for the SoC PM code to use.
9 select PM_GENERIC_DOMAINS if PM
50 to communicate and use the Wakeup M3 for PM features like suspend54 tristate "TI SCI PM Domains Driver"
89 #define PM(n) (0x0100 + 0x20 + (n) * 2) macro169 reg = readw(pctrl->base + PM(port)); in rzg2l_pinctrl_set_pfc_mode()171 writew(reg, pctrl->base + PM(port)); in rzg2l_pinctrl_set_pfc_mode()826 reg16 = readw(pctrl->base + PM(port)); in rzg2l_gpio_set_direction()830 writew(reg16, pctrl->base + PM(port)); in rzg2l_gpio_set_direction()844 reg16 = readw(pctrl->base + PM(port)); in rzg2l_gpio_get_direction()906 reg16 = readw(pctrl->base + PM(port)); in rzg2l_gpio_get()
19 the PM functions which include clock/DVFS/thermal/power from the CPU.