Searched refs:PPCLK_DCEFCLK (Results 1 – 11 of 11) sorted by relevance
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega20_processpptables.c | 233 pptable->DpmDescriptor[PPCLK_DCEFCLK].VoltageMode, 234 pptable->DpmDescriptor[PPCLK_DCEFCLK].SnapToDiscrete, 235 pptable->DpmDescriptor[PPCLK_DCEFCLK].NumDiscreteLevels, 236 pptable->DpmDescriptor[PPCLK_DCEFCLK].padding, 237 pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.m, 238 pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.b, 239 pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.a, 240 pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.b, 241 pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.c); 362 pr_info("DcModeMaxFreq[PPCLK_DCEFCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCEFCLK]);
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D | vega12_hwmgr.c | 725 ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DCEFCLK); in vega12_setup_default_dpm_tables() 1231 (PPCLK_DCEFCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level() 1577 clk_select = PPCLK_DCEFCLK; in vega12_display_clock_voltage_request() 2325 PPSMC_MSG_GetDpmClockFreq, (PPCLK_DCEFCLK << 16), in vega12_print_clock_levels()
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D | vega20_hwmgr.c | 711 ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DCEFCLK); in vega20_setup_default_dpm_tables() 1634 PPCLK_DCEFCLK)) == 0, in vega20_init_max_sustainable_clocks() 1902 (PPCLK_DCEFCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level() 2293 clk_select = PPCLK_DCEFCLK; in vega20_display_clock_voltage_request() 3432 ret = vega20_get_current_clk_freq(hwmgr, PPCLK_DCEFCLK, &now); in vega20_print_clock_levels()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_smu11_driver_if.h | 15 PPCLK_DCEFCLK, enumerator
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D | dcn30_clk_mgr.c | 132 dcn3_init_single_clock(clk_mgr, PPCLK_DCEFCLK, in dcn3_init_clocks() 237 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_k… in dcn3_update_clocks()
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/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | navi10_ppt.c | 158 CLK_MAP(DCEFCLK, PPCLK_DCEFCLK), 580 *value = metrics->CurrClock[PPCLK_DCEFCLK]; in navi10_get_legacy_smu_metrics_data() 666 *value = metrics->CurrClock[PPCLK_DCEFCLK]; in navi10_get_smu_metrics_data() 755 *value = metrics->CurrClock[PPCLK_DCEFCLK]; in navi12_get_legacy_smu_metrics_data() 841 *value = metrics->CurrClock[PPCLK_DCEFCLK]; in navi12_get_smu_metrics_data() 1068 !driver_ppt->DpmDescriptor[PPCLK_DCEFCLK].SnapToDiscrete; in navi10_set_default_dpm_table() 1206 case PPCLK_DCEFCLK: in navi10_get_current_clk_freq_by_table()
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D | sienna_cichlid_ppt.c | 171 CLK_MAP(DCEFCLK, PPCLK_DCEFCLK), 794 *value = use_metrics_v3 ? metrics_v3->CurrClock[PPCLK_DCEFCLK] : in sienna_cichlid_get_smu_metrics_data() 795 use_metrics_v2 ? metrics_v2->CurrClock[PPCLK_DCEFCLK] : in sienna_cichlid_get_smu_metrics_data() 796 metrics->CurrClock[PPCLK_DCEFCLK]; in sienna_cichlid_get_smu_metrics_data() 1069 !table_member[PPCLK_DCEFCLK].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table() 1215 case PPCLK_DCEFCLK: in sienna_cichlid_get_current_clk_freq_by_table()
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/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/ |
D | smu9_driver_if.h | 225 PPCLK_DCEFCLK, enumerator
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/drivers/gpu/drm/amd/pm/powerplay/inc/ |
D | smu11_driver_if.h | 323 PPCLK_DCEFCLK, enumerator
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/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
D | smu11_driver_if_navi10.h | 375 PPCLK_DCEFCLK, enumerator
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D | smu11_driver_if_sienna_cichlid.h | 482 PPCLK_DCEFCLK, enumerator
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