/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 268 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_update_clocks() 271 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_update_clocks() 285 …dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz… in dcn3_update_clocks() 366 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_set_hard_min_memclk() 369 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_set_hard_min_memclk() 372 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_set_hard_min_memclk() 385 dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, in dcn3_set_hard_max_memclk() 396 dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz); in dcn3_set_max_memclk() 404 dcn30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, memclk_mhz); in dcn3_set_min_memclk() 417 dcn3_init_single_clock(clk_mgr, PPCLK_UCLK, in dcn3_get_memclk_states_from_smu() [all …]
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D | dcn30_smu11_driver_if.h | 9 PPCLK_UCLK, enumerator
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/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | vega20_processpptables.c | 216 pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode, 217 pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete, 218 pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels, 219 pptable->DpmDescriptor[PPCLK_UCLK].padding, 220 pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m, 221 pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b, 222 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a, 223 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b, 224 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c); 361 pr_info("DcModeMaxFreq[PPCLK_UCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_UCLK]);
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D | vega12_hwmgr.c | 673 ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_UCLK); in vega12_setup_default_dpm_tables() 1170 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level() 1178 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega12_upload_dpm_min_level() 1263 (PPCLK_UCLK << 16) | (max_freq & 0xffff), in vega12_upload_dpm_max_level() 1364 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false) == 0, in vega12_dpm_get_mclk() 1369 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true) == 0, in vega12_dpm_get_mclk() 1442 smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_UCLK << 16), in vega12_get_current_mclk_freq() 2526 (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level, in vega12_set_uclk_to_highest_dpm_level() 2900 gpu_metrics->current_uclk = metrics.CurrClock[PPCLK_UCLK]; in vega12_get_gpu_metrics()
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D | vega20_hwmgr.c | 613 ret = vega20_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_UCLK); in vega20_setup_memclk_dpm_table() 1620 PPCLK_UCLK)) == 0, in vega20_init_max_sustainable_clocks() 1833 (PPCLK_UCLK << 16) | (min_freq & 0xffff), in vega20_upload_dpm_min_level() 1936 (PPCLK_UCLK << 16) | (max_freq & 0xffff), in vega20_upload_dpm_max_level() 2091 ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false); in vega20_dpm_get_mclk() 2096 ret = vega20_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true); in vega20_dpm_get_mclk() 2216 PPCLK_UCLK, in vega20_read_sensor() 2364 (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level, in vega20_notify_smc_display_config_after_ps_adjustment() 3384 ret = vega20_get_current_clk_freq(hwmgr, PPCLK_UCLK, &now); in vega20_print_clock_levels() 3583 (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level, in vega20_set_uclk_to_highest_dpm_level() [all …]
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 386 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_update_clocks() 409 …dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz… in dcn32_update_clocks() 634 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_set_hard_min_memclk() 637 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_set_hard_min_memclk() 640 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_set_hard_min_memclk() 653 dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_set_hard_max_memclk() 668 dcn32_init_single_clock(clk_mgr, PPCLK_UCLK, in dcn32_get_memclk_states_from_smu()
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D | dcn32_smu13_driver_if.h | 9 PPCLK_UCLK, enumerator
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D | smu13_driver_if.h | 36 PPCLK_UCLK, enumerator
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/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | arcturus_ppt.c | 169 CLK_MAP(UCLK, PPCLK_UCLK), 170 CLK_MAP(MCLK, PPCLK_UCLK), 379 !driver_ppt->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete; in arcturus_set_default_dpm_table() 619 *value = metrics->CurrClock[PPCLK_UCLK]; in arcturus_get_smu_metrics_data() 724 case PPCLK_UCLK: in arcturus_get_current_clk_freq_by_table() 976 (PPCLK_UCLK << 16) | (freq & 0xffff), in arcturus_upload_dpm_level() 1736 pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode, in arcturus_dump_pptable() 1737 pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete, in arcturus_dump_pptable() 1738 pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels, in arcturus_dump_pptable() 1739 pptable->DpmDescriptor[PPCLK_UCLK].padding, in arcturus_dump_pptable() [all …]
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D | sienna_cichlid_ppt.c | 165 CLK_MAP(UCLK, PPCLK_UCLK), 166 CLK_MAP(MCLK, PPCLK_UCLK), 769 *value = use_metrics_v3 ? metrics_v3->CurrClock[PPCLK_UCLK] : in sienna_cichlid_get_smu_metrics_data() 770 use_metrics_v2 ? metrics_v2->CurrClock[PPCLK_UCLK] : in sienna_cichlid_get_smu_metrics_data() 771 metrics->CurrClock[PPCLK_UCLK]; in sienna_cichlid_get_smu_metrics_data() 988 !table_member[PPCLK_UCLK].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table() 1194 case PPCLK_UCLK: in sienna_cichlid_get_current_clk_freq_by_table() 2008 num_discrete_levels = table_member1[PPCLK_UCLK].NumDiscreteLevels; in sienna_cichlid_get_uclk_dpm_states() 2597 pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode, in beige_goby_dump_pptable() 2598 pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete, in beige_goby_dump_pptable() [all …]
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D | navi10_ppt.c | 154 CLK_MAP(UCLK, PPCLK_UCLK), 155 CLK_MAP(MCLK, PPCLK_UCLK), 571 *value = metrics->CurrClock[PPCLK_UCLK]; in navi10_get_legacy_smu_metrics_data() 657 *value = metrics->CurrClock[PPCLK_UCLK]; in navi10_get_smu_metrics_data() 746 *value = metrics->CurrClock[PPCLK_UCLK]; in navi12_get_legacy_smu_metrics_data() 832 *value = metrics->CurrClock[PPCLK_UCLK]; in navi12_get_smu_metrics_data() 1014 !driver_ppt->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete; in navi10_set_default_dpm_table() 1194 case PPCLK_UCLK: in navi10_get_current_clk_freq_by_table() 2256 num_discrete_levels = driver_ppt->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels; in navi10_get_uclk_dpm_states() 2927 gpu_metrics->current_uclk = metrics.CurrClock[PPCLK_UCLK]; in navi10_get_legacy_gpu_metrics() [all …]
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/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
D | aldebaran_ppt.c | 163 CLK_MAP(UCLK, PPCLK_UCLK), 164 CLK_MAP(MCLK, PPCLK_UCLK), 604 *value = metrics->CurrClock[PPCLK_UCLK]; in aldebaran_get_smu_metrics_data() 706 case PPCLK_UCLK: in aldebaran_get_current_clk_freq_by_table() 965 (PPCLK_UCLK << 16) | (freq & 0xffff), in aldebaran_upload_dpm_level() 1783 gpu_metrics->current_uclk = metrics.CurrClock[PPCLK_UCLK]; in aldebaran_get_gpu_metrics()
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D | smu_v13_0_0_ppt.c | 156 CLK_MAP(UCLK, PPCLK_UCLK), 157 CLK_MAP(MCLK, PPCLK_UCLK), 728 *value = metrics->CurrClock[PPCLK_UCLK]; in smu_v13_0_0_get_smu_metrics_data() 976 case PPCLK_UCLK: in smu_v13_0_0_get_current_clk_freq_by_table() 1310 gpu_metrics->current_uclk = metrics->CurrClock[PPCLK_UCLK]; in smu_v13_0_0_get_gpu_metrics()
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D | smu_v13_0_7_ppt.c | 136 CLK_MAP(UCLK, PPCLK_UCLK), 137 CLK_MAP(MCLK, PPCLK_UCLK), 742 *value = metrics->CurrClock[PPCLK_UCLK]; in smu_v13_0_7_get_smu_metrics_data() 987 case PPCLK_UCLK: in smu_v13_0_7_get_current_clk_freq_by_table()
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/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
D | smu13_driver_if_aldebaran.h | 245 PPCLK_UCLK, enumerator
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D | smu11_driver_if_arcturus.h | 369 PPCLK_UCLK, enumerator
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D | smu11_driver_if_navi10.h | 372 PPCLK_UCLK, enumerator
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D | smu13_driver_if_v13_0_7.h | 443 PPCLK_UCLK, enumerator
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D | smu13_driver_if_v13_0_0.h | 439 PPCLK_UCLK, enumerator
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D | smu11_driver_if_sienna_cichlid.h | 476 PPCLK_UCLK, enumerator
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/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/ |
D | smu9_driver_if.h | 224 PPCLK_UCLK, enumerator
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/drivers/gpu/drm/amd/pm/powerplay/inc/ |
D | smu11_driver_if.h | 322 PPCLK_UCLK, enumerator
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