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Searched refs:QSYS_PAUSE_CFG_PAUSE_ENA (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/microchip/sparx5/
Dsparx5_port.c1061 QSYS_PAUSE_CFG_PAUSE_ENA, in sparx5_port_init()
Dsparx5_main_regs.h4781 #define QSYS_PAUSE_CFG_PAUSE_ENA BIT(1) macro
4783 FIELD_PREP(QSYS_PAUSE_CFG_PAUSE_ENA, x)
4785 FIELD_GET(QSYS_PAUSE_CFG_PAUSE_ENA, x)