Searched refs:REFCLK_CNTL (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn301/ |
| D | dcn301_dccg.h | 37 SR(REFCLK_CNTL)
50 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
51 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
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| /drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_dccg.h | 18 SR(REFCLK_CNTL),\
31 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
32 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.h | 37 SR(REFCLK_CNTL),\
71 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
72 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh),\
253 uint32_t REFCLK_CNTL; member
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| D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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| D | dcn20_hwseq.c | 2692 if (REG(REFCLK_CNTL)) in dcn20_fpga_init_hw()
2693 REG_WRITE(REFCLK_CNTL, 0); in dcn20_fpga_init_hw()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.h | 172 SR(REFCLK_CNTL), \
393 SR(REFCLK_CNTL), \
581 uint32_t REFCLK_CNTL; member
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| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_hwseq.c | 122 REG_WRITE(REFCLK_CNTL, 0); in dcn31_init_hw()
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| /drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_hwseq.c | 242 REG_WRITE(REFCLK_CNTL, 0); in dcn201_init_hw()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_hwseq.c | 456 REG_WRITE(REFCLK_CNTL, 0); in dcn30_init_hw()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 1504 REG_WRITE(REFCLK_CNTL, 0); in dcn10_init_hw()
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