Searched refs:REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK (Results 1 – 2 of 2) sorted by relevance
409 #define REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK 0x00009306 macro
857 gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~0); in a6xx_gmu_irq_disable()1007 gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_MASK, ~A6XX_GMU_IRQ_MASK); in a6xx_gmu_resume()