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Searched refs:R_000100_MC_PT0_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Drs600.c532 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
534 WREG32_MC(R_000100_MC_PT0_CNTL, tmp); in rs600_gart_tlb_flush()
536 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
538 WREG32_MC(R_000100_MC_PT0_CNTL, tmp); in rs600_gart_tlb_flush()
540 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
542 WREG32_MC(R_000100_MC_PT0_CNTL, tmp); in rs600_gart_tlb_flush()
543 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
579 WREG32_MC(R_000100_MC_PT0_CNTL, in rs600_gart_enable()
615 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_enable()
616 WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1))); in rs600_gart_enable()
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Drs600d.h535 #define R_000100_MC_PT0_CNTL 0x000100 macro