Home
last modified time | relevance | path

Searched refs:SATA_PLL_CFG0_PADPLL_RESET_SWCTL (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/tegra/
Dclk-pll.c111 #define SATA_PLL_CFG0_PADPLL_RESET_SWCTL BIT(0) macro
1702 val &= ~SATA_PLL_CFG0_PADPLL_RESET_SWCTL; in clk_plle_tegra114_enable()
Dclk-tegra210.c180 #define SATA_PLL_CFG0_PADPLL_RESET_SWCTL BIT(0) macro
571 val &= ~SATA_PLL_CFG0_PADPLL_RESET_SWCTL; in tegra210_sata_pll_hw_control_enable()