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Searched refs:SCLK_FSTATE_0_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Dsumod.h184 # define SCLK_FSTATE_0_DIV_MASK (0x7f << 0) macro
Dsumo_dpm.c481 SCLK_FSTATE_0_DIV(divider), ~SCLK_FSTATE_0_DIV_MASK); in sumo_set_divider_value()