Searched refs:SH_MEM_BASES (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| D | cik_sdma.c | 964 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_dma_vm_flush()
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| D | cikd.h | 1163 #define SH_MEM_BASES 0x8C28 macro
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| D | cik.c | 5510 WREG32(SH_MEM_BASES, 0); in cik_pcie_gart_enable()
5706 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_vm_flush()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 2446 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v9_0_constants_init()
2448 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v9_0_constants_init()
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| D | gfx_v11_0.c | 1671 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v11_0_constants_init()
1673 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v11_0_constants_init()
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| D | gfx_v10_0.c | 5065 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v10_0_constants_init()
5067 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v10_0_constants_init()
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