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Searched refs:SLCR_GEM0_CLK_CTRL (Results 1 – 1 of 1) sorted by relevance

/drivers/clk/zynq/
Dclkc.c29 #define SLCR_GEM0_CLK_CTRL (zynq_clkc_base + 0x40) macro
387 CLK_SET_RATE_NO_REPARENT, SLCR_GEM0_CLK_CTRL, 4, 2, 0, in zynq_clk_setup()
390 SLCR_GEM0_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | in zynq_clk_setup()
393 CLK_SET_RATE_PARENT, SLCR_GEM0_CLK_CTRL, 20, 6, in zynq_clk_setup()
398 SLCR_GEM0_CLK_CTRL, 6, 1, 0, in zynq_clk_setup()
402 SLCR_GEM0_CLK_CTRL, 0, 0, &gem0clk_lock); in zynq_clk_setup()