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Searched refs:SPLL_CNTL_MODE (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/radeon/
Drv6xxd.h27 #define SPLL_CNTL_MODE 0x60c macro
Dsi.c4017 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
4019 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
4029 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
4031 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
7428 orig = data = RREG32(SPLL_CNTL_MODE); in si_program_aspm()
7431 WREG32(SPLL_CNTL_MODE, data); in si_program_aspm()
Drv770d.h111 #define SPLL_CNTL_MODE 0x610 macro
Dsid.h108 #define SPLL_CNTL_MODE 0x618 macro
Drv6xx_dpm.c407 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC); in rv6xx_enable_engine_feedback_and_reference_sync()
Drv770_dpm.c876 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC); in rv770_program_engine_speed_parameters()
/drivers/gpu/drm/amd/amdgpu/
Dsi.c1361 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
1363 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
1373 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
1375 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
2608 orig = data = RREG32(SPLL_CNTL_MODE); in si_program_aspm()
2611 WREG32(SPLL_CNTL_MODE, data); in si_program_aspm()
Dsid.h109 #define SPLL_CNTL_MODE 0x186 macro