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Searched refs:SPLL_PLL_ENABLE (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_pch_refclk.c405 if ((ctl & SPLL_PLL_ENABLE) == 0) in spll_uses_pch_ssc()
Dintel_dpll_mgr.c641 intel_de_write(dev_priv, SPLL_CTL, val & ~SPLL_PLL_ENABLE); in hsw_ddi_spll_disable()
690 return val & SPLL_PLL_ENABLE; in hsw_ddi_spll_get_hw_state()
1068 SPLL_PLL_ENABLE | SPLL_FREQ_1350MHz | SPLL_REF_MUXED_SSC; in hsw_ddi_spll_compute_dpll()
Dintel_display_power.c1160 I915_STATE_WARN(intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE, in assert_can_disable_lcpll()
/drivers/gpu/drm/i915/
Di915_reg.h7018 #define SPLL_PLL_ENABLE (1 << 31) macro