Searched refs:SSPP_RGB0 (Results 1 – 8 of 8) sorted by relevance
/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_cfg.c | 30 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18, 119 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18, 208 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, 306 [SSPP_RGB0] = 7, [SSPP_RGB1] = 8, 378 [SSPP_RGB0] = 7, [SSPP_RGB1] = 8, 460 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, 678 [SSPP_RGB0] = 7, [SSPP_RGB1] = 8,
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D | mdp5_ctl.c | 295 case SSPP_RGB0: return MDP5_CTL_LAYER_REG_RGB0(stage); in mdp_ctl_blend_mask() 318 case SSPP_RGB0: return MDP5_CTL_LAYER_EXT_REG_RGB0_BIT3; in mdp_ctl_blend_ext_mask() 446 case SSPP_RGB0: return MDP5_CTL_FLUSH_RGB0; in mdp_ctl_flush_mask_pipe()
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D | mdp5_kms.h | 213 case SSPP_RGB0: in pipe2nclients()
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D | mdp5.xml.h | 79 SSPP_RGB0 = 4, enumerator 553 case SSPP_RGB0: return (mdp5_cfg->pipe_rgb.base[0]); in __offset_PIPE()
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D | mdp5_kms.c | 685 SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3, in hwpipe_init() enumerator
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/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_top.c | 142 status->sspp[SSPP_RGB0] = (value >> 12) & 0x3; in dpu_hw_get_danger_status() 239 status->sspp[SSPP_RGB0] = (value >> 12) & 0x1; in dpu_hw_get_safe_status()
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D | dpu_hw_mdss.h | 115 SSPP_RGB0, enumerator
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D | dpu_hw_ctl.c | 169 case SSPP_RGB0: in dpu_hw_ctl_update_pending_flush_sspp() 447 case SSPP_RGB0: in dpu_hw_ctl_setup_blendstage()
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