Searched refs:SS_CTRL (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/bridge/imx/ |
| D | imx8qm-ldb-drv.c | 34 #define SS_CTRL 0x20 macro
191 regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0); in imx8qm_ldb_bridge_mode_set()
193 regmap_update_bits(ldb->regmap, SS_CTRL, in imx8qm_ldb_bridge_mode_set()
197 regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0); in imx8qm_ldb_bridge_mode_set()
199 regmap_update_bits(ldb->regmap, SS_CTRL, in imx8qm_ldb_bridge_mode_set()
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| D | imx8qxp-ldb-drv.c | 29 #define SS_CTRL 0x20 macro
190 regmap_update_bits(ldb->regmap, SS_CTRL, CH_VSYNC_M(chno), 0); in imx8qxp_ldb_bridge_mode_set()
192 regmap_update_bits(ldb->regmap, SS_CTRL, in imx8qxp_ldb_bridge_mode_set()
196 regmap_update_bits(ldb->regmap, SS_CTRL, CH_HSYNC_M(chno), 0); in imx8qxp_ldb_bridge_mode_set()
198 regmap_update_bits(ldb->regmap, SS_CTRL, in imx8qxp_ldb_bridge_mode_set()
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| /drivers/mtd/nand/raw/ |
| D | mxic_nand.c | 66 #define SS_CTRL(s) (0x30 + ((s) * 4)) macro
409 OP_CMD_BYTES(0), nfc->regs + SS_CTRL(0)); in mxic_nfc_exec_op()
419 nfc->regs + SS_CTRL(0)); in mxic_nfc_exec_op()
428 OP_READ, nfc->regs + SS_CTRL(0)); in mxic_nfc_exec_op()
438 nfc->regs + SS_CTRL(0)); in mxic_nfc_exec_op()
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| /drivers/spi/ |
| D | spi-mxic.c | 67 #define SS_CTRL(s) (0x30 + ((s) * 4)) macro
527 mxic->regs + SS_CTRL(mem->spi->chip_select)); in mxic_spi_mem_exec_op()
629 mxic->regs + SS_CTRL(0)); in mxic_spi_transfer_one()
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| /drivers/media/i2c/ |
| D | ov2640.c | 139 #define SS_CTRL 0xF8 /* SCCB Slave Control */ macro
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