1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * sun4i-ss.h - hardware cryptographic accelerator for Allwinner A20 SoC 4 * 5 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com> 6 * 7 * Support AES cipher with 128,192,256 bits keysize. 8 * Support MD5 and SHA1 hash algorithms. 9 * Support DES and 3DES 10 * 11 * You could find the datasheet in Documentation/arm/sunxi.rst 12 */ 13 14 #include <linux/clk.h> 15 #include <linux/crypto.h> 16 #include <linux/io.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/platform_device.h> 20 #include <linux/reset.h> 21 #include <crypto/scatterwalk.h> 22 #include <linux/scatterlist.h> 23 #include <linux/interrupt.h> 24 #include <linux/delay.h> 25 #include <linux/pm_runtime.h> 26 #include <crypto/md5.h> 27 #include <crypto/skcipher.h> 28 #include <crypto/sha1.h> 29 #include <crypto/hash.h> 30 #include <crypto/internal/hash.h> 31 #include <crypto/internal/skcipher.h> 32 #include <crypto/aes.h> 33 #include <crypto/internal/des.h> 34 #include <crypto/internal/rng.h> 35 #include <crypto/rng.h> 36 37 #define SS_CTL 0x00 38 #define SS_KEY0 0x04 39 #define SS_KEY1 0x08 40 #define SS_KEY2 0x0C 41 #define SS_KEY3 0x10 42 #define SS_KEY4 0x14 43 #define SS_KEY5 0x18 44 #define SS_KEY6 0x1C 45 #define SS_KEY7 0x20 46 47 #define SS_IV0 0x24 48 #define SS_IV1 0x28 49 #define SS_IV2 0x2C 50 #define SS_IV3 0x30 51 52 #define SS_FCSR 0x44 53 54 #define SS_MD0 0x4C 55 #define SS_MD1 0x50 56 #define SS_MD2 0x54 57 #define SS_MD3 0x58 58 #define SS_MD4 0x5C 59 60 #define SS_RXFIFO 0x200 61 #define SS_TXFIFO 0x204 62 63 /* SS_CTL configuration values */ 64 65 /* PRNG generator mode - bit 15 */ 66 #define SS_PRNG_ONESHOT (0 << 15) 67 #define SS_PRNG_CONTINUE (1 << 15) 68 69 /* IV mode for hash */ 70 #define SS_IV_ARBITRARY (1 << 14) 71 72 /* SS operation mode - bits 12-13 */ 73 #define SS_ECB (0 << 12) 74 #define SS_CBC (1 << 12) 75 #define SS_CTS (3 << 12) 76 77 /* Counter width for CNT mode - bits 10-11 */ 78 #define SS_CNT_16BITS (0 << 10) 79 #define SS_CNT_32BITS (1 << 10) 80 #define SS_CNT_64BITS (2 << 10) 81 82 /* Key size for AES - bits 8-9 */ 83 #define SS_AES_128BITS (0 << 8) 84 #define SS_AES_192BITS (1 << 8) 85 #define SS_AES_256BITS (2 << 8) 86 87 /* Operation direction - bit 7 */ 88 #define SS_ENCRYPTION (0 << 7) 89 #define SS_DECRYPTION (1 << 7) 90 91 /* SS Method - bits 4-6 */ 92 #define SS_OP_AES (0 << 4) 93 #define SS_OP_DES (1 << 4) 94 #define SS_OP_3DES (2 << 4) 95 #define SS_OP_SHA1 (3 << 4) 96 #define SS_OP_MD5 (4 << 4) 97 #define SS_OP_PRNG (5 << 4) 98 99 /* Data end bit - bit 2 */ 100 #define SS_DATA_END (1 << 2) 101 102 /* PRNG start bit - bit 1 */ 103 #define SS_PRNG_START (1 << 1) 104 105 /* SS Enable bit - bit 0 */ 106 #define SS_DISABLED (0 << 0) 107 #define SS_ENABLED (1 << 0) 108 109 /* SS_FCSR configuration values */ 110 /* RX FIFO status - bit 30 */ 111 #define SS_RXFIFO_FREE (1 << 30) 112 113 /* RX FIFO empty spaces - bits 24-29 */ 114 #define SS_RXFIFO_SPACES(val) (((val) >> 24) & 0x3f) 115 116 /* TX FIFO status - bit 22 */ 117 #define SS_TXFIFO_AVAILABLE (1 << 22) 118 119 /* TX FIFO available spaces - bits 16-21 */ 120 #define SS_TXFIFO_SPACES(val) (((val) >> 16) & 0x3f) 121 122 #define SS_RX_MAX 32 123 #define SS_RX_DEFAULT SS_RX_MAX 124 #define SS_TX_MAX 33 125 126 #define SS_RXFIFO_EMP_INT_PENDING (1 << 10) 127 #define SS_TXFIFO_AVA_INT_PENDING (1 << 8) 128 #define SS_RXFIFO_EMP_INT_ENABLE (1 << 2) 129 #define SS_TXFIFO_AVA_INT_ENABLE (1 << 0) 130 131 #define SS_SEED_LEN 192 132 #define SS_DATA_LEN 160 133 134 /* 135 * struct ss_variant - Describe SS hardware variant 136 * @sha1_in_be: The SHA1 digest is given by SS in BE, and so need to be inverted. 137 */ 138 struct ss_variant { 139 bool sha1_in_be; 140 }; 141 142 struct sun4i_ss_ctx { 143 const struct ss_variant *variant; 144 void __iomem *base; 145 int irq; 146 struct clk *busclk; 147 struct clk *ssclk; 148 struct reset_control *reset; 149 struct device *dev; 150 struct resource *res; 151 char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */ 152 char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */ 153 spinlock_t slock; /* control the use of the device */ 154 #ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG 155 u32 seed[SS_SEED_LEN / BITS_PER_LONG]; 156 #endif 157 struct dentry *dbgfs_dir; 158 struct dentry *dbgfs_stats; 159 }; 160 161 struct sun4i_ss_alg_template { 162 u32 type; 163 u32 mode; 164 union { 165 struct skcipher_alg crypto; 166 struct ahash_alg hash; 167 struct rng_alg rng; 168 } alg; 169 struct sun4i_ss_ctx *ss; 170 unsigned long stat_req; 171 unsigned long stat_fb; 172 unsigned long stat_bytes; 173 unsigned long stat_opti; 174 }; 175 176 struct sun4i_tfm_ctx { 177 u32 key[AES_MAX_KEY_SIZE / 4];/* divided by sizeof(u32) */ 178 u32 keylen; 179 u32 keymode; 180 struct sun4i_ss_ctx *ss; 181 struct crypto_skcipher *fallback_tfm; 182 }; 183 184 struct sun4i_cipher_req_ctx { 185 u32 mode; 186 u8 backup_iv[AES_BLOCK_SIZE]; 187 struct skcipher_request fallback_req; // keep at the end 188 }; 189 190 struct sun4i_req_ctx { 191 u32 mode; 192 u64 byte_count; /* number of bytes "uploaded" to the device */ 193 u32 hash[5]; /* for storing SS_IVx register */ 194 char buf[64]; 195 unsigned int len; 196 int flags; 197 }; 198 199 int sun4i_hash_crainit(struct crypto_tfm *tfm); 200 void sun4i_hash_craexit(struct crypto_tfm *tfm); 201 int sun4i_hash_init(struct ahash_request *areq); 202 int sun4i_hash_update(struct ahash_request *areq); 203 int sun4i_hash_final(struct ahash_request *areq); 204 int sun4i_hash_finup(struct ahash_request *areq); 205 int sun4i_hash_digest(struct ahash_request *areq); 206 int sun4i_hash_export_md5(struct ahash_request *areq, void *out); 207 int sun4i_hash_import_md5(struct ahash_request *areq, const void *in); 208 int sun4i_hash_export_sha1(struct ahash_request *areq, void *out); 209 int sun4i_hash_import_sha1(struct ahash_request *areq, const void *in); 210 211 int sun4i_ss_cbc_aes_encrypt(struct skcipher_request *areq); 212 int sun4i_ss_cbc_aes_decrypt(struct skcipher_request *areq); 213 int sun4i_ss_ecb_aes_encrypt(struct skcipher_request *areq); 214 int sun4i_ss_ecb_aes_decrypt(struct skcipher_request *areq); 215 216 int sun4i_ss_cbc_des_encrypt(struct skcipher_request *areq); 217 int sun4i_ss_cbc_des_decrypt(struct skcipher_request *areq); 218 int sun4i_ss_ecb_des_encrypt(struct skcipher_request *areq); 219 int sun4i_ss_ecb_des_decrypt(struct skcipher_request *areq); 220 221 int sun4i_ss_cbc_des3_encrypt(struct skcipher_request *areq); 222 int sun4i_ss_cbc_des3_decrypt(struct skcipher_request *areq); 223 int sun4i_ss_ecb_des3_encrypt(struct skcipher_request *areq); 224 int sun4i_ss_ecb_des3_decrypt(struct skcipher_request *areq); 225 226 int sun4i_ss_cipher_init(struct crypto_tfm *tfm); 227 void sun4i_ss_cipher_exit(struct crypto_tfm *tfm); 228 int sun4i_ss_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, 229 unsigned int keylen); 230 int sun4i_ss_des_setkey(struct crypto_skcipher *tfm, const u8 *key, 231 unsigned int keylen); 232 int sun4i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, 233 unsigned int keylen); 234 int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, 235 unsigned int slen, u8 *dst, unsigned int dlen); 236 int sun4i_ss_prng_seed(struct crypto_rng *tfm, const u8 *seed, unsigned int slen); 237