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Searched refs:S_MI0_PHY_REG_ADDR (Results 1 – 1 of 1) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dfpga_defs.h88 #define S_MI0_PHY_REG_ADDR 0 macro
90 #define V_MI0_PHY_REG_ADDR(x) ((x) << S_MI0_PHY_REG_ADDR)
91 #define G_MI0_PHY_REG_ADDR(x) (((x) >> S_MI0_PHY_REG_ADDR) & M_MI0_PHY_REG_ADDR)