Home
last modified time | relevance | path

Searched refs:TCC_CACHE_POLICY_LRU (Results 1 – 24 of 24) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_8_0_enum.h987 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dsmu_7_1_0_enum.h1141 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dsmu_7_1_3_enum.h1201 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dsmu_7_1_1_enum.h1147 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dsmu_7_1_2_enum.h1165 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_8_2_enum.h987 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dgmc_8_1_enum.h1117 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_enum.h987 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dbif_5_0_enum.h1117 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_6_0_enum.h1000 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Duvd_5_0_enum.h1130 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_enum.h1067 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Ddce_10_0_enum.h1692 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Ddce_11_0_enum.h5559 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Ddce_11_2_enum.h6197 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_enum.h1282 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Doss_3_0_enum.h1416 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Doss_3_0_1_enum.h1383 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h6224 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dgfx_8_1_enum.h6727 TCC_CACHE_POLICY_LRU = 0x0, enumerator
Dgfx_8_0_enum.h6777 TCC_CACHE_POLICY_LRU = 0x0, enumerator
/drivers/gpu/drm/amd/include/
Dvega10_enum.h1029 TCC_CACHE_POLICY_LRU = 0x00000000, enumerator
Dnavi10_enum.h276 TCC_CACHE_POLICY_LRU = 0x00000000, enumerator
Dsoc21_enum.h470 TCC_CACHE_POLICY_LRU = 0x00000000, enumerator