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Searched refs:THM_TMON0_RDIL1_DATA__VALID_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_6_0_sh_mask.h364 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x00000800L macro
Dsmu_7_1_1_sh_mask.h3387 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x800 macro
Dsmu_7_1_0_sh_mask.h4169 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x800 macro
Dsmu_7_0_1_sh_mask.h4181 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x800 macro
Dsmu_7_1_2_sh_mask.h4303 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x800 macro
Dsmu_7_1_3_sh_mask.h4001 #define THM_TMON0_RDIL1_DATA__VALID_MASK 0x800 macro
/drivers/gpu/drm/amd/include/asic_reg/thm/
Dthm_10_0_sh_mask.h176 #define THM_TMON0_RDIL1_DATA__VALID_MASK … macro
Dthm_13_0_2_sh_mask.h328 #define THM_TMON0_RDIL1_DATA__VALID_MASK … macro
Dthm_9_0_sh_mask.h320 #define THM_TMON0_RDIL1_DATA__VALID_MASK … macro