Searched refs:TRCCNTCTLRn (Results 1 – 4 of 4) sorted by relevance
| /drivers/hwtracing/coresight/ |
| D | coresight-cfg-afdo.c | 57 .offset = TRCCNTCTLRn(0),
75 .offset = TRCCNTCTLRn(1),
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| D | coresight-etm4x.h | 56 #define TRCCNTCTLRn(n) (0x150 + (n * 4)) /* n = 0-3 */ macro
308 CASE_##op((val), TRCCNTCTLRn(0)) \
309 CASE_##op((val), TRCCNTCTLRn(1)) \
310 CASE_##op((val), TRCCNTCTLRn(2)) \
311 CASE_##op((val), TRCCNTCTLRn(3)) \
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| D | coresight-etm4x-cfg.c | 124 CHECKREGIDX(TRCCNTCTLRn(0), cntr_ctrl, idx, off_mask); in etm4_cfg_map_reg_offset()
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| D | coresight-etm4x-core.c | 434 etm4x_relaxed_write32(csa, config->cntr_ctrl[i], TRCCNTCTLRn(i)); in etm4_enable_hw()
1640 state->trccntctlr[i] = etm4x_read32(csa, TRCCNTCTLRn(i)); in __etm4_cpu_save()
1771 etm4x_relaxed_write32(csa, state->trccntctlr[i], TRCCNTCTLRn(i)); in __etm4_cpu_restore()
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