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Searched refs:UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h425 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Duvd_4_2_sh_mask.h236 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf macro
Duvd_3_1_sh_mask.h236 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf macro
Duvd_4_0_sh_mask.h71 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0x0000000f macro
Duvd_5_0_sh_mask.h258 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf macro
Duvd_6_0_sh_mask.h260 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h918 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Dvcn_2_5_sh_mask.h1986 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1936 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Dvcn_2_6_0_sh_mask.h3657 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2716 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro
Dvcn_4_0_0_sh_mask.h94 #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT … macro