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Searched refs:UVD_CGC_GATE__SYS_MASK (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c643 data |= UVD_CGC_GATE__SYS_MASK |
675 data &= ~(UVD_CGC_GATE__SYS_MASK |
1299 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v6_0_enable_clock_gating()
1388 cgc_flags = UVD_CGC_GATE__SYS_MASK |
Duvd_v5_0.c643 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v5_0_enable_clock_gating()
730 cgc_flags = UVD_CGC_GATE__SYS_MASK |
Duvd_v7_0.c1672 cgc_flags = UVD_CGC_GATE__SYS_MASK |
Dvcn_v4_0.c653 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c505 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c480 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c572 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c710 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h397 #define UVD_CGC_GATE__SYS_MASK … macro
Duvd_4_2_sh_mask.h123 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
Duvd_3_1_sh_mask.h123 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
Duvd_4_0_sh_mask.h100 #define UVD_CGC_GATE__SYS_MASK 0x00000001L macro
Duvd_5_0_sh_mask.h135 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
Duvd_6_0_sh_mask.h137 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h825 #define UVD_CGC_GATE__SYS_MASK … macro
Dvcn_2_5_sh_mask.h1895 #define UVD_CGC_GATE__SYS_MASK … macro
Dvcn_2_0_0_sh_mask.h1844 #define UVD_CGC_GATE__SYS_MASK … macro
Dvcn_2_6_0_sh_mask.h3566 #define UVD_CGC_GATE__SYS_MASK … macro
Dvcn_3_0_0_sh_mask.h2625 #define UVD_CGC_GATE__SYS_MASK … macro
Dvcn_4_0_0_sh_mask.h60 #define UVD_CGC_GATE__SYS_MASK … macro