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Searched refs:UVD_CGC_GATE__WCB_MASK (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c658 UVD_CGC_GATE__WCB_MASK |
691 UVD_CGC_GATE__WCB_MASK |
1315 UVD_CGC_GATE__WCB_MASK | in uvd_v6_0_enable_clock_gating()
1403 UVD_CGC_GATE__WCB_MASK |
Duvd_v5_0.c658 UVD_CGC_GATE__WCB_MASK | in uvd_v5_0_enable_clock_gating()
745 UVD_CGC_GATE__WCB_MASK |
Duvd_v7_0.c1687 UVD_CGC_GATE__WCB_MASK |
Dvcn_v4_0.c670 | UVD_CGC_GATE__WCB_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c522 | UVD_CGC_GATE__WCB_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c497 | UVD_CGC_GATE__WCB_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c589 | UVD_CGC_GATE__WCB_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c727 | UVD_CGC_GATE__WCB_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h414 #define UVD_CGC_GATE__WCB_MASK … macro
Duvd_4_2_sh_mask.h157 #define UVD_CGC_GATE__WCB_MASK 0x20000 macro
Duvd_3_1_sh_mask.h157 #define UVD_CGC_GATE__WCB_MASK 0x20000 macro
Duvd_4_0_sh_mask.h116 #define UVD_CGC_GATE__WCB_MASK 0x00020000L macro
Duvd_5_0_sh_mask.h169 #define UVD_CGC_GATE__WCB_MASK 0x20000 macro
Duvd_6_0_sh_mask.h171 #define UVD_CGC_GATE__WCB_MASK 0x20000 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h842 #define UVD_CGC_GATE__WCB_MASK … macro
Dvcn_2_5_sh_mask.h1912 #define UVD_CGC_GATE__WCB_MASK … macro
Dvcn_2_0_0_sh_mask.h1861 #define UVD_CGC_GATE__WCB_MASK … macro
Dvcn_2_6_0_sh_mask.h3583 #define UVD_CGC_GATE__WCB_MASK … macro
Dvcn_3_0_0_sh_mask.h2642 #define UVD_CGC_GATE__WCB_MASK … macro
Dvcn_4_0_0_sh_mask.h77 #define UVD_CGC_GATE__WCB_MASK … macro