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Searched refs:UVD_CGC_MEM_DS_CTRL__MPC1_DS_EN__SHIFT (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_3_0_0_sh_mask.h4888 #define UVD_CGC_MEM_DS_CTRL__MPC1_DS_EN__SHIFT … macro
Dvcn_4_0_0_sh_mask.h7375 #define UVD_CGC_MEM_DS_CTRL__MPC1_DS_EN__SHIFT … macro