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Searched refs:UVD_CGC_STATUS__RBC_SCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h185 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800 macro
Duvd_3_1_sh_mask.h185 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800 macro
Duvd_4_0_sh_mask.h180 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x00000800L macro
Duvd_5_0_sh_mask.h201 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800 macro
Duvd_6_0_sh_mask.h203 #define UVD_CGC_STATUS__RBC_SCLK_MASK 0x800 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h889 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro
Dvcn_2_5_sh_mask.h1958 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro
Dvcn_2_0_0_sh_mask.h1908 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro
Dvcn_2_6_0_sh_mask.h3629 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro
Dvcn_3_0_0_sh_mask.h2688 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro
Dvcn_4_0_0_sh_mask.h3852 #define UVD_CGC_STATUS__RBC_SCLK_MASK … macro