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Searched refs:UVD_CGC_STATUS__WCB_SCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h211 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000 macro
Duvd_3_1_sh_mask.h211 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000 macro
Duvd_4_0_sh_mask.h206 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x01000000L macro
Duvd_5_0_sh_mask.h227 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000 macro
Duvd_6_0_sh_mask.h229 #define UVD_CGC_STATUS__WCB_SCLK_MASK 0x1000000 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h902 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro
Dvcn_2_5_sh_mask.h1971 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro
Dvcn_2_0_0_sh_mask.h1921 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro
Dvcn_2_6_0_sh_mask.h3642 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro
Dvcn_3_0_0_sh_mask.h2701 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro
Dvcn_4_0_0_sh_mask.h3865 #define UVD_CGC_STATUS__WCB_SCLK_MASK macro