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Searched refs:UVD_CGC_UDEC_STATUS__MP_DCLK_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h293 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK 0x2000 macro
Duvd_3_1_sh_mask.h293 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK 0x2000 macro
Duvd_4_0_sh_mask.h226 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK 0x00002000L macro
Duvd_5_0_sh_mask.h317 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK 0x2000 macro
Duvd_6_0_sh_mask.h319 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK 0x2000 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2054 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK … macro
Dvcn_2_0_0_sh_mask.h2006 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK … macro
Dvcn_2_6_0_sh_mask.h3725 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK … macro
Dvcn_3_0_0_sh_mask.h2784 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK … macro
Dvcn_4_0_0_sh_mask.h3902 #define UVD_CGC_UDEC_STATUS__MP_DCLK_MASK … macro