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Searched refs:UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h296 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT 0xe macro
Duvd_3_1_sh_mask.h296 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT 0xe macro
Duvd_4_0_sh_mask.h231 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT 0x0000000e macro
Duvd_5_0_sh_mask.h320 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT 0xe macro
Duvd_6_0_sh_mask.h322 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT 0xe macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2040 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1992 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT … macro
Dvcn_2_6_0_sh_mask.h3711 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2770 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT … macro
Dvcn_4_0_0_sh_mask.h3888 #define UVD_CGC_UDEC_STATUS__MP_VCLK__SHIFT … macro