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Searched refs:UVD_FW_POWER_STATUS__UVDC_PWR_OFF_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_sh_mask.h3440 #define UVD_FW_POWER_STATUS__UVDC_PWR_OFF_MASK … macro
Dvcn_3_0_0_sh_mask.h2497 #define UVD_FW_POWER_STATUS__UVDC_PWR_OFF_MASK … macro