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Searched refs:UVD_JRBC_STATUS__INT_EN_MASK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h776 #define UVD_JRBC_STATUS__INT_EN_MASK … macro
Dvcn_2_5_sh_mask.h762 #define UVD_JRBC_STATUS__INT_EN_MASK … macro
Dvcn_2_0_0_sh_mask.h759 #define UVD_JRBC_STATUS__INT_EN_MASK … macro
Dvcn_2_6_0_sh_mask.h2591 #define UVD_JRBC_STATUS__INT_EN_MASK … macro
Dvcn_3_0_0_sh_mask.h921 #define UVD_JRBC_STATUS__INT_EN_MASK … macro
Dvcn_4_0_0_sh_mask.h5302 #define UVD_JRBC_STATUS__INT_EN_MASK … macro