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Searched refs:UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h719 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro
Dvcn_2_5_sh_mask.h1005 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1002 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro
Dvcn_2_6_0_sh_mask.h1637 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro
Dvcn_3_0_0_sh_mask.h1263 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro
Dvcn_4_0_0_sh_mask.h5526 #define UVD_LMI_JRBC_IB_VMID__IB_RD_VMID__SHIFT … macro