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Searched refs:UVD_MPC_CNTL__REPLACEMENT_MODE_MASK (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h471 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK 0x38 macro
Duvd_3_1_sh_mask.h467 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK 0x38 macro
Duvd_4_0_sh_mask.h488 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK 0x00000038L macro
Duvd_5_0_sh_mask.h503 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK 0x38 macro
Duvd_6_0_sh_mask.h505 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK 0x38 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1103 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
Dvcn_2_5_sh_mask.h2836 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
Dvcn_2_0_0_sh_mask.h2601 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
Dvcn_2_6_0_sh_mask.h2828 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
Dvcn_3_0_0_sh_mask.h3909 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
Dvcn_4_0_0_sh_mask.h4159 #define UVD_MPC_CNTL__REPLACEMENT_MODE_MASK macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c1050 tmp &= ~UVD_MPC_CNTL__REPLACEMENT_MODE_MASK; in vcn_v4_0_start()
Dvcn_v2_0.c970 tmp &= ~UVD_MPC_CNTL__REPLACEMENT_MODE_MASK; in vcn_v2_0_start()
Dvcn_v1_0.c823 tmp &= ~UVD_MPC_CNTL__REPLACEMENT_MODE_MASK; in vcn_v1_0_start_spg_mode()
Dvcn_v2_5.c971 tmp &= ~UVD_MPC_CNTL__REPLACEMENT_MODE_MASK; in vcn_v2_5_start()
Dvcn_v3_0.c1149 tmp &= ~UVD_MPC_CNTL__REPLACEMENT_MODE_MASK; in vcn_v3_0_start()