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Searched refs:UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h52 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
Dvcn_2_5_sh_mask.h1490 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1487 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
Dvcn_2_6_0_sh_mask.h2928 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2018 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
Dvcn_4_0_0_sh_mask.h6311 #define UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT … macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c612 | 2 << UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT in vcn_v4_0_enable_static_power_gating()
Dvcn_v2_0.c780 | 2 << UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT in vcn_v2_0_enable_static_power_gating()
Dvcn_v1_0.c766 | 2 << UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT in vcn_1_0_enable_static_power_gating()
Dvcn_v3_0.c671 | 2 << UVD_PGFSM_STATUS__UVDF_PWR_STATUS__SHIFT in vcn_v3_0_enable_static_power_gating()