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Searched refs:UVD_RB_BASE_LO__RB_BASE_LO__SHIFT (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h301 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h641 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
Dvcn_2_5_sh_mask.h2456 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
Dvcn_2_0_0_sh_mask.h3606 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
Dvcn_2_6_0_sh_mask.h4278 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
Dvcn_3_0_0_sh_mask.h3385 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro
Dvcn_4_0_0_sh_mask.h3315 #define UVD_RB_BASE_LO__RB_BASE_LO__SHIFT … macro