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Searched refs:UVD_SUVD_CGC_GATE__IME_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h242 #define UVD_SUVD_CGC_GATE__IME_MASK macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h470 #define UVD_SUVD_CGC_GATE__IME_MASK macro
Dvcn_2_5_sh_mask.h2099 #define UVD_SUVD_CGC_GATE__IME_MASK macro
Dvcn_2_0_0_sh_mask.h3225 #define UVD_SUVD_CGC_GATE__IME_MASK macro
Dvcn_2_6_0_sh_mask.h3770 #define UVD_SUVD_CGC_GATE__IME_MASK macro
Dvcn_3_0_0_sh_mask.h2835 #define UVD_SUVD_CGC_GATE__IME_MASK macro
Dvcn_4_0_0_sh_mask.h1352 #define UVD_SUVD_CGC_GATE__IME_MASK macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v3_0.c774 | UVD_SUVD_CGC_GATE__IME_MASK in vcn_v3_0_disable_clock_gating()