Home
last modified time | relevance | path

Searched refs:UVD_SUVD_CGC_GATE__SCLR_MASK (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h239 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Duvd_5_0_sh_mask.h749 #define UVD_SUVD_CGC_GATE__SCLR_MASK 0x2000 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h467 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Dvcn_2_5_sh_mask.h2096 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Dvcn_2_0_0_sh_mask.h3222 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Dvcn_2_6_0_sh_mask.h3767 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Dvcn_3_0_0_sh_mask.h2832 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
Dvcn_4_0_0_sh_mask.h1349 #define UVD_SUVD_CGC_GATE__SCLR_MASK macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c714 | UVD_SUVD_CGC_GATE__SCLR_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c565 | UVD_SUVD_CGC_GATE__SCLR_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c540 | UVD_SUVD_CGC_GATE__SCLR_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c635 | UVD_SUVD_CGC_GATE__SCLR_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c772 | UVD_SUVD_CGC_GATE__SCLR_MASK in vcn_v3_0_disable_clock_gating()