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Searched refs:UVD_SUVD_CGC_GATE__SITE_MASK (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h473 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
Dvcn_2_5_sh_mask.h2102 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
Dvcn_2_0_0_sh_mask.h3228 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
Dvcn_2_6_0_sh_mask.h3773 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
Dvcn_3_0_0_sh_mask.h2838 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
Dvcn_4_0_0_sh_mask.h1355 #define UVD_SUVD_CGC_GATE__SITE_MASK … macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c719 | UVD_SUVD_CGC_GATE__SITE_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c570 | UVD_SUVD_CGC_GATE__SITE_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c545 | UVD_SUVD_CGC_GATE__SITE_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c640 | UVD_SUVD_CGC_GATE__SITE_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c777 | UVD_SUVD_CGC_GATE__SITE_MASK in vcn_v3_0_disable_clock_gating()