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Searched refs:UVD_SUVD_CGC_GATE__SRE_AV1_MASK (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dvcn_v3_0.c785 | UVD_SUVD_CGC_GATE__SRE_AV1_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_3_0_0_sh_mask.h2846 #define UVD_SUVD_CGC_GATE__SRE_AV1_MASK … macro
Dvcn_4_0_0_sh_mask.h1363 #define UVD_SUVD_CGC_GATE__SRE_AV1_MASK … macro