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Searched refs:UVD_VCPU_CNTL__CLK_EN__SHIFT (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h664 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Duvd_4_2_sh_mask.h548 #define UVD_VCPU_CNTL__CLK_EN__SHIFT 0x9 macro
Duvd_3_1_sh_mask.h544 #define UVD_VCPU_CNTL__CLK_EN__SHIFT 0x9 macro
Duvd_4_0_sh_mask.h769 #define UVD_VCPU_CNTL__CLK_EN__SHIFT 0x00000009 macro
Duvd_5_0_sh_mask.h580 #define UVD_VCPU_CNTL__CLK_EN__SHIFT 0x9 macro
Duvd_6_0_sh_mask.h582 #define UVD_VCPU_CNTL__CLK_EN__SHIFT 0x9 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1184 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Dvcn_2_5_sh_mask.h2747 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Dvcn_2_0_0_sh_mask.h2743 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Dvcn_2_6_0_sh_mask.h100 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Dvcn_3_0_0_sh_mask.h3805 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro
Dvcn_4_0_0_sh_mask.h4051 #define UVD_VCPU_CNTL__CLK_EN__SHIFT … macro