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Searched refs:UVD_VCPU_CNTL__IRQ_ERR_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_sh_mask.h535 #define UVD_VCPU_CNTL__IRQ_ERR_MASK 0xf macro
Duvd_3_1_sh_mask.h531 #define UVD_VCPU_CNTL__IRQ_ERR_MASK 0xf macro
Duvd_4_0_sh_mask.h774 #define UVD_VCPU_CNTL__IRQ_ERR_MASK 0x0000000fL macro
Duvd_5_0_sh_mask.h567 #define UVD_VCPU_CNTL__IRQ_ERR_MASK 0xf macro
Duvd_6_0_sh_mask.h569 #define UVD_VCPU_CNTL__IRQ_ERR_MASK 0xf macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2754 #define UVD_VCPU_CNTL__IRQ_ERR_MASK … macro
Dvcn_2_0_0_sh_mask.h2754 #define UVD_VCPU_CNTL__IRQ_ERR_MASK … macro
Dvcn_2_6_0_sh_mask.h107 #define UVD_VCPU_CNTL__IRQ_ERR_MASK … macro
Dvcn_3_0_0_sh_mask.h3813 #define UVD_VCPU_CNTL__IRQ_ERR_MASK … macro
Dvcn_4_0_0_sh_mask.h4061 #define UVD_VCPU_CNTL__IRQ_ERR_MASK … macro